Exams
| Exam | Time | Info |
|---|---|---|
| Quiz | Tues., Feb. 13 at 7 PM Pacific | Info |
| Midterm | Tues, Mar. 26 at 7 PM Pacific | Info |
| Final | Sat., May 4 at 2:00 PM Pacific | Info |
Lectures
| Week | Lecture - Tuesday | Lab - Wednesday/Friday | Lecture - Thursday |
|---|---|---|---|
| 1 (1/8-1/12) |
Course overview, embedded systems, computer organization [ PDF Complete ] [ Day 1 Survey ] [ Watch this video BEFORE you come to Lecture 2 ] |
Lab 0: Installing the Arduino Toolchain (Linux tutorial, software installation) |
Basic circuit analysis (voltage, current, Ohm's law) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 2 (1/15-1/19) |
Transistors, Digital logic, combinational and sequential circuits [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 1 - Electronic circuits (exploration of KVL/KCL/Ohm's laws) |
Boolean Algebra (Single-variable theorems) Combinational and sequential circuits [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 3 (1/22-1/26) |
Number systems, binary, hexadecimal, character codes [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 2 - Oscilloscopes, combination gate network, delays |
Microcontollers 1 (bitwise operations) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 4 (1/29-2/2) |
Microcontrollers 2 (digital I/O) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 3: Digital I/O lab with Arduinos |
Microcontroller 3 (advanced bit fiddling), State machines [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 5 (2/5-2/9) |
More State machines LCDs and parallel interfaces [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 4: LCDs |
Combinational logic design 1 (Minterms/maxterms) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 6 (2/12-2/16) |
Combinational logic design 2 (Boolean Algebra, Karnaugh maps) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 5: Analog to Digital Conversion |
Combinational logic design 3 (More Karnaugh maps) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 7 (2/19-2/23) |
Interrupts [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 6: Timers |
Combinational logic design 4 (Components: Decoders and Muxes) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 8 (2/26-3/1) |
Signed Number Systems [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 7: Rotary Encoders |
Adders [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 9 (3/4-3/8) |
Sequential logic 1 (latches, FFs and registers) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Sequential logic 2 (latches, FFs and registers) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
|
| 10 (3/18-3/15) |
Sequential logic 3 (latches, FFs and registers) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 8: PWM |
Hardware State Machines (1) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 11 (3/25-3/29) |
Hardware State Machines (2) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 9: Hardware Datapath Components |
Hardware components (ALUs, registers, instruction cycle) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 12 (4/1-4/5) |
Processor Organization (Design of CPU) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project Part 1 |
Processor Organization (Design of CPU) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 13 (4/8-4/12) |
Performance [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project Part 2 |
Memory/FPGAs [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 14 (4/15-4/19) |
Memory/FPGAs [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project Part 3 |
Interfacing (voltage and current capabilities) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 15 (4/22-4/26) |
Embedded Failures |
Project Demos |
Summary and Review [ PDF Summary ] [ PDF Review ] |
