Exams
| Exam | Time | Info |
|---|---|---|
| Quiz | Tues., Feb. 17 at 7 PM Pacific | Info |
| Midterm | Tues, Mar. 31 at 7 PM Pacific | Info |
| Final | Sat., May 9 at 2:00 PM Pacific | Info |
Lectures
| Week | Lecture - Tuesday | Lab - Wednesday/Friday | Lecture - Thursday |
|---|---|---|---|
| 1 (1/12-1/16) |
Course overview, embedded systems, computer organization [ PDF Complete ] [ Day 1 Survey ] [ Watch this video BEFORE you come to Lecture 2 ] |
Lab 0: Installing the Arduino Toolchain (Linux tutorial, software installation) |
Basic circuit analysis (voltage, current, Ohm's law) [ PDF Notes ] [ PDF Complete ] |
| 2 (1/19-1/23) |
Transistors, Digital logic, combinational and sequential circuits [ PDF Notes ] [ PDF Complete ] |
Lab 1 - Electronic circuits (exploration of KVL/KCL/Ohm's laws) |
Boolean Algebra (Single-variable theorems) Combinational and sequential circuits [ PDF Notes ] [ PDF Complete ] |
| 3 (1/26-1/30) |
Number systems, binary, hexadecimal, character codes [ PDF Notes ] [ PDF Complete ] |
Lab 2 - Oscilloscopes, combination gate network, delays |
Microcontollers 1 (bitwise operations) [ PDF Notes ] [ PDF Complete ] |
| 4 (2/2-2/6) |
Microcontrollers 2 (digital I/O) [ PDF Notes ] [ PDF Complete ] |
Lab 3: Digital I/O lab with Arduinos |
Microcontroller 3 (advanced bit fiddling) LCDs and parallel interfaces [ PDF Notes ] [ PDF Complete ] |
| 5 (2/9-2/13) |
State Machines [ PDF Notes ] [ PDF Complete ] |
Lab 4: LCDs |
Interrupts [ PDF Notes ] [ PDF Complete ] |
| 6 (2/16-2/20) |
Combinational logic design 1 (Minterms/maxterms) [ PDF Notes ] [ PDF Complete ] |
Lab 5: Timers |
Combinational logic design 2 (Boolean Algebra, DeMorgan's) [ PDF Notes ] [ PDF Complete ] |
| 7 (2/23-2/27) |
Combinational logic design 3 (Karnaugh maps) [ PDF Notes ] [ PDF Complete ] |
Lab 6: Rotary Encoders |
Combinational logic design 4 (Components: Decoders and Muxes) [ PDF Notes ] [ PDF Complete ] |
| 8 (3/2-3/6) |
Muxes [ PDF Notes ] [ PDF Complete ] |
Lab 7: ADC/PWM |
Signed Number Systems [ PDF Notes ] [ PDF Complete ] |
| 9 (3/9-3/13) |
Adders [ PDF Notes ] [ PDF Complete ] |
Sequential logic 1 (latches, FFs and registers) [ PDF Notes ] [ PDF Complete ] [ 2025 PDF Notes ] [ 2025 PDF Complete ] |
|
| 10 (3/23-3/27) |
Sequential logic 2 (latches, FFs and registers) [ PDF Notes ] [ PDF Complete ] [ 2025 PDF Notes ] [ 2025 PDF Complete ] |
Lab 8: Hardware Datapath Components |
Sequential logic 1 (latches, FFs and registers) [ PDF Notes ] [ PDF Complete ] [ 2025 PDF Notes ] [ 2025 PDF Complete ] |
| 11 (3/30-4/3) |
Hardware State Machines (1) [ PDF Notes ] [ PDF Complete ] [ 2025 PDF Notes ] [ 2025 PDF Complete ] |
Hardware State Machines (2) [ PDF Notes ] [ PDF Complete ] [ 2025 PDF Notes ] [ 2025 PDF Complete ] |
|
| 12 (4/6-4/10) |
Hardware components (ALUs, registers, instruction cycle) [ PDF Notes ] [ PDF Complete ] |
Project Part 1 |
Processor Organization (Design of CPU) [ PDF Notes ] [ PDF Complete ] [ 2025 PDF Notes ] [ 2025 PDF Complete ] |
| 13 (4/13-4/17) |
Processor Organization (Design of CPU) [ PDF Notes ] [ PDF Complete ] [ 2025 PDF Notes ] [ 2025 PDF Complete ] |
Project Part 2 |
Processor Organization (Design of CPU) Tri-State Buffers [ PDF Notes ] [ PDF Complete ] [ 2025 PDF Notes ] [ 2025 PDF Complete ] |
| 14 (4/20-4/24) |
Performance Memory/FPGAs 1 [ Performance PDF Notes ] [ Performance PDF Complete ] [ Mem/FPGAs PDF Notes ] [ Mem/FPGAs PDF Complete ] |
Project Part 3 |
Memory/FPGAs 2 Interfacing (voltage and current capabilities) [ FPGA PDF Notes ] [ FPGA PDF Complete ] [ Interfacing PDF Notes ] [ Interfacing PDF Complete ] [ Interfacing 2025 PDF Notes ] [ Interfacing 2025 PDF Complete ] |
| 15 (4/27-5/1) |
Performance Failures Summary [ Performance PDF Notes ] [ Performance PDF Complete ] [ Failures PDF ] [ Summary PDF ] |
Project Demos |
Summary and Review [ PDF Review ] |
