Exams
Exam | Time | Info |
---|---|---|
Quiz | Tues., Sep. 30 at 7 PM Pacific | Info |
Midterm | Tues, Oct. 28 at 7 PM Pacific | Info |
Final | Sat., Dec. 13 at 2:00 PM Pacific | Info |
Lectures
Week | Lecture - Tuesday | Lab - Wednesday/Friday | Lecture - Thursday |
---|---|---|---|
1 (8/25-8/29) |
Course overview, embedded systems, computer organization [ PDF Complete ] [ Day 1 Survey ] [ Watch this video BEFORE you come to Lecture 2 ] |
Lab 0: Installing the Arduino Toolchain (Linux tutorial, software installation) |
Basic circuit analysis (voltage, current, Ohm's law) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
2 (9/1-9/5) |
Transistors, Digital logic, combinational and sequential circuits [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 1 - Electronic circuits (exploration of KVL/KCL/Ohm's laws) |
Boolean Algebra (Single-variable theorems) Combinational and sequential circuits [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
3 (9/8-9/12) |
Number systems, binary, hexadecimal, character codes [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 2 - Oscilloscopes, combination gate network, delays |
Microcontollers 1 (bitwise operations) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
4 (9/15-9/19) |
Microcontrollers 2 (digital I/O) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 3: Digital I/O lab with Arduinos |
Microcontroller 3 (advanced bit fiddling) LCDs and parallel interfaces [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
5 (9/22-9/26) |
State Machines [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 4: LCDs |
Interrupts [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
6 (9/29-10/4) |
Combinational logic design 1 (Minterms/maxterms) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 5: Timers |
Combinational logic design 2 (Boolean Algebra, Karnaugh maps) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
7 (10/6-10/10) |
Combinational logic design 3 (More Karnaugh maps) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Fall Break |
|
8 (10/13-10/17) |
Combinational logic design 4 (Components: Decoders and Muxes) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 6: Rotary Encoders |
Muxes [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
9 (10/20-10/24) |
Signed Number Systems [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 7: ADC/PWM |
Adders [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
10 (10/27-10/31) |
Sequential logic 1 (latches, FFs and registers) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 8: Hardware Datapath Components |
Sequential logic 2 (latches, FFs and registers) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
11 (11/3-11/7) |
Hardware State Machines (1) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project |
Hardware State Machines (2) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
12 (11/10-11/14) |
Veteran's Day Holiday |
Hardware components (ALUs, registers, instruction cycle) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
|
13 (11/17-11/21) |
Processor Organization (Design of CPU) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project work (checkpoint 1 due) |
Processor Organization (Design of CPU) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
14 (11/24-11/28) |
Performance [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Thanksgiving Holiday |
|
15 (12/1-12/5) |
Memory/FPGAs [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project Demos |
Interfacing (voltage and current capabilities) Review [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] [ Review ] |