Exams
Exam | Time | Info |
---|---|---|
Quiz | Tues., Feb. 18 at 7 PM Pacific | Info |
Midterm | Tues, Apr. 1 at 7 PM Pacific | Info |
Final | Sat., May 10 at 2:00 PM Pacific | Info |
Lectures
Week | Lecture - Tuesday | Lab - Wednesday/Friday | Lecture - Thursday |
---|---|---|---|
1 (1/13-1/17) |
Course overview, embedded systems, computer organization [ PDF Complete ] [ Day 1 Survey ] [ Watch this video BEFORE you come to Lecture 2 ] |
Lab 0: Installing the Arduino Toolchain (Linux tutorial, software installation) |
Basic circuit analysis (voltage, current, Ohm's law) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
2 (1/20-1/24) |
Transistors, Digital logic, combinational and sequential circuits [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 1 - Electronic circuits (exploration of KVL/KCL/Ohm's laws) |
Boolean Algebra (Single-variable theorems) Combinational and sequential circuits [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
3 (1/27-1/31) |
Number systems, binary, hexadecimal, character codes [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 2 - Oscilloscopes, combination gate network, delays |
Microcontollers 1 (bitwise operations) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
4 (2/3-2/7) |
Microcontrollers 2 (digital I/O) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 3: Digital I/O lab with Arduinos |
Microcontroller 3 (advanced bit fiddling) LCDs and parallel interfaces [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
5 (2/10-2/14) |
State Machines [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 4: LCDs |
Interrupts [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
6 (2/17-2/21) |
Combinational logic design 1 (Minterms/maxterms) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 5: Timers |
Combinational logic design 2 (Boolean Algebra, DeMorgan's) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
7 (2/24-2/28) |
Combinational logic design 3 (Karnaugh maps) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 6: Rotary Encoders |
Combinational logic design 4 (Components: Decoders and Muxes) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
8 (3/3-3/7) |
Muxes [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 7: ADC/PWM |
Signed Number Systems [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
9 (3/10-3/14) |
Adders [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Sequential logic 1 (latches, FFs and registers) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
|
10 (3/24-3/28) |
Sequential logic 2 (latches, FFs and registers) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 8: Hardware Datapath Components |
Hardware State Machines (1) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
11 (3/31-4/4) |
Hardware State Machines (2) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Hardware components (ALUs, registers, instruction cycle) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
|
12 (4/7-4/11) |
Processor Organization (Design of CPU) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project Part 1 |
Processor Organization (Design of CPU) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
13 (4/14-4/18) |
Memory/FPGAs 1 [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project Part 2 |
Memory/FPGAs 2 [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
14 (4/21-4/25) |
Performance [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project Part 3 |
Interfacing (voltage and current capabilities) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
15 (4/28-5/2) |
Embedded Failures |
Project Demos |
Summary and Review [ PDF Summary ] [ PDF Review ] |