Exams
| Exam | Time | Info |
|---|---|---|
| Quiz | Tues., Oct. 1 at 7 PM Pacific | Info |
| Midterm | Tues, Nov. 5 at 7 PM Pacific | Info |
| Final | Sat., Dec. 14 at 2:00 PM Pacific | Info |
Lectures
| Week | Lecture - Tuesday | Lab - Wednesday/Friday | Lecture - Thursday |
|---|---|---|---|
| 1 (8/26-8/30) |
Course overview, embedded systems, computer organization [ PDF Complete ] [ Day 1 Survey ] [ Watch this video BEFORE you come to Lecture 2 ] |
Lab 0: Installing the Arduino Toolchain (Linux tutorial, software installation) |
Basic circuit analysis (voltage, current, Ohm's law) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 2 (9/2-9/6) |
Transistors, Digital logic, combinational and sequential circuits [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 1 - Electronic circuits (exploration of KVL/KCL/Ohm's laws) |
Boolean Algebra (Single-variable theorems) Combinational and sequential circuits [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 3 (9/9-9/13) |
Number systems, binary, hexadecimal, character codes [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 2 - Oscilloscopes, combination gate network, delays |
Microcontollers 1 (bitwise operations) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 4 (9/16-9/20) |
Microcontrollers 2 (digital I/O) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 3: Digital I/O lab with Arduinos |
Microcontroller 3 (advanced bit fiddling), State machines [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 5 (9/23-9/27) |
More State machines LCDs and parallel interfaces [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 4: LCDs |
Combinational logic design 1 (Minterms/maxterms) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 6 (9/30-10-4) |
Combinational logic design 2 (Boolean Algebra, Karnaugh maps) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 5: Analog to Digital Conversion |
Combinational logic design 3 (More Karnaugh maps) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 7 (10/7-10/11) |
Interrupts [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Fall Break |
|
| 8 (10/14-10/18) |
Combinational logic design 4 (Components: Decoders and Muxes) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 6: Timers |
Muxes [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 9 (10/21-10/25) |
Signed Number Systems [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 7: Rotary Encoders |
Adders [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 10 (10/28-11/1) |
Sequential logic 1 (latches, FFs and registers) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 8: Pulse Width Modulation |
Sequential logic 2 (latches, FFs and registers) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 11 (11/4-11/8) |
Hardware State Machines (1) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Lab 9: Hardware Datapath Components |
Hardware State Machines (2) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 12 (11/11-11/15) |
Hardware components (ALUs, registers, instruction cycle) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project |
Processor Organization (Design of CPU) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 13 (11/18-11/22) |
Processor Organization (Design of CPU) [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project (checkpoint 1 due) |
Performance [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
| 14 (11/25-11/29) |
Memory/FPGAs [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Thanksgiving Holiday |
|
| 15 (12/2-12/6) |
Memory/FPGAs [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] |
Project Demos |
Interfacing (voltage and current capabilities) Review [ PDF Notes 4up ] [ PDF Notes 1up ] [ PDF Complete ] [ Review ] |
