Assignments
Homework will be assigned roughly once per week. It will be graded and require substantial work.
All homeworks will be submitted on Gradescope. A few homeworks will require hand-written and drawn answers and be graded AFTER submission. But most homeworks will be graded as closed-set answers to relevant problems. You may enter your answers, see what you got wrong, and then resubmit as many times as you like BEFORE the due date, all via Gradescope.
We strongly recommend that you download the PDF’s below and work through each problem (without looking at Gradescope). Only when you feel confident in your answers should you then open Gradescope and key in the answers, check them, and then go back and update them.
For detailed information on late submission policies, grace periods, and similar questions about assignments, check the syllabus.
Please ask any questions at our course Q&A site.
HW Schedule
| HW | Topic | Due Date |
|---|---|---|
| HW01 | Digital Design Review | Fri. May 30 @ 11:59PM (PDT) on Gradescope |
| HW02 | Instruction Sets | Fri. June 6 @ 11:59PM (PDT) on Gradescope |
| HW03 | Performance Metrics | Tues. June 10 @ 11:59PM (PDT) on Gradescope |
| HW04 | Computer Arithmetic (Self-Attest for Credit) | Sun. June 15 @ 11:59PM (PDT) on Gradescope |
| HW05 | Single Cycle CPU | Sun. June 15 @ 11:59PM (PDT) on Gradescope |
| HW06 | Cache Memory | Thurs. July 3 @ 11:59PM (PDT) on Gradescope |
| HW07 | Virtual Memory | Thurs. July 10 @ 11:59PM (PDT) on Gradescope |
Labs
| Lab | Topic | Due Date |
|---|---|---|
| Lab 1 | Min/Max Finder | Fri. May 30 at 11:59PM (PDT) |
| Lab 2a | ALU Design | Fri. June 6 at 11:59PM (PDT) |
| Lab 2b | Matrix Multiply (Assembly Programming) | Fri. June 13 at 11:59PM (PDT) |
| Lab 3 | Pipelined Processor | Fri. June 27 at 11:59PM (PDT) |
| Lab 4 | Cache & Coherence | Wed. July 9 at 11:59PM (PDT) |
| Lab 5 | FIFO/ROB Design | Sun. July 13 at 11:59PM (PDT) No late submission |