Discussion
Discussion will be used to introduce lab and review important concepts from lecture. Be sure to attend.
Any notes/slides will be posted in the Shared folder.
BEFORE Attending Discussion 1
You are expected to have some knowledge of digital design and describing digital hardware using Verilog (or other HDL). Follow the Verilog tutorials listed on our remedial Verilog page
Discussion 1 - Modelsim & Tool Setup / Verilog Review and Lab 1
Follow the tools setup on the tools page to install QuestaSim and other utilities.