# EE109 – Fall 2022: Introduction to Embedded Systems

## Midterm Info

### What, When and Where

**Wed. Mar. 9 at 7 p.m.**

**The Spring 22 Quiz will be in-person. **

**Location**:

**Prof. Redekopp and Qian's sections**: THH 101**Prof. Puvvada's section**: THH 114**OSAS Accommodations (1.5x time)**: THH 106

**Policies and Procedures**:

- The midterm will be
**1 hour 40 minutes** - The midterm is
**CLOSED BOOK / CLOSED INTERNET SOURCE** - Calculators may
**ONLY**be used on the**Analog/Resistive circuits problem** - The exam will be administered via paper and pen/pencil.
- Students with 1.5x time for academic accommodations will be granted their additional scaled time but take the exam in a separately proctored room. Students with other accommodations (2x time, etc.) should make arrangements to take the exam with OSAS earlier that day.
- Students who are in COVID protocol must let your REGISTERED instructor know by the morning on the date of the quiz if you will not be able to take it in person. We will setup alternate arrangements for you. If you don't let your instructor know in advance, you will likely be assigned a 0 on the quiz.
- We will provide a list of Boolean Algebra theorems on the exam
- You must abide by the honor code below.

**Honor Code**

I pledge to uphold the highest academic standards and integrity. In accordance with USC Viterbi's Honor Code (https://viterbischool.usc.edu/academic-integrity/), I affirm that I have not used any unauthorized materials in completing this exam, and have neither given assistance to others nor received assistance from others. Further, I affirm that I have not observed any other students in this class acting to gain an unfair advantage, or I have reported to my instructor any activity I have observed that is not in accordance with USC Viterbi's Honor Code. I do so to sustain a Viterbi culture of integrity, responsibility, community and "excellence in all our endeavors." I understand that there are significant consequences for violating academic integrity (https://policy.usc.edu/scampus-part-b/)

and that suspected violations will be reported to the School and the University.

### Topics

Topics will be cumulative but focus on Units 5 - 10 (material after the Quiz). Thus, we can still ask you bit-fiddling questions, binary and number representation problems, and/or resistive circuit questions but those would have less weight than the questions on Units 5-10.

#### Unit 1

- KCL & KVL
- Ohm's Law
- Series and Parallel Resistance
- Voltage dividers
- Solving for voltages and currents in a circuit
- Appropriate ways to connected buttons/switches and LEDs

#### Unit 2

- Transistors as switches
- Logic Gates and tracing the bits through a gate network
- Design goals
- Registers and Flip-flops

#### Unit 3

- Number systems
- Converting base r to base 10
- Unique combinations
- Approximating Large Powers of 2
- Converting base 10 => base 2
- Converting binary <=> octal <=> hexadecimal
- Single variable theorems

#### Unit 4

- Bit fiddling (
`&`,`|`,`~`and`^`) - DDR, PORT, and PIN register functions
- Setting, clearing, and checking bits

#### Unit 5

- What is state?
- Representing state machines with state diagrams
**Implementing a state machine in software****Performing operations at different rates**

#### Unit 6

- Copying bits
**No need to memorize LCD commands, code, etc.**

#### Unit 7

- Using AND and OR gates to check for combinations
- Using sum of minterms (canonical sums) to implement a logic function
- Using product of maxterms (canonical products) to implement a logic function
**Using Boolean algebra theorems to simplify****Applying DeMorgan's theorem and its gate equivalents**

#### Unit 8

**K-Maps (up to 4 variables, Don't cares, etc.)**- Implementing an arbitrary combinational function by converting a word description to a truth table and then implementing the circuit using K-Maps

#### Unit 9

- Full decoders and their implementation
- Enables and decoders
- Mux operation
- Designing muxes at the gate level
**Designing muxes from smaller muxes**- (not covered in Spring '22) Understand what a tri-state gate is and how it should/can be used

#### Unit 10

- General understanding of interrupts (vs. polling or busy looping), ISRs, how interrupts are enabled, what hardware does to check for interrupts, etc.

### Style

The exam will have only a few general short answer/fill in the blank question, and instead focus more on ability to apply knowledge through problems similar to your homeworks but requiring the use of 1 or more concepts that demonstrate understanding. You should know the material and procedures for solving problems well enough that you can quickly produce solutions once you identify the procedure to apply. If you spend unnecessary time trying to recall what procedure applies when and how to perform that procedure you will likely run out of time.

### Ways to Prepare

- Study the slides
- For units 2, 7, 8, and 9, the Vahid textbook has review problems.
- Review your homeworks and labs understanding what general concepts and processes have been taught and how/when to apply those processes to new problems (especially your labs!).
- Review the bit fiddling and digital I/O using this website. Click on one of the types of bit fiddling problems to generate a sample problem, and you can then check your answer to see if it's correct.
- Review the Quiz 1 for mistakes you might have made and correct your misconceptions.
- Print the sample problems below and give yourself 10-15 minutes per problem without looking at any notes/material. Only then check the solutions and see where you need to study more.
- Look at the linked appendix A below (with solutions in Appendix B) and try the problems relevant to HW2, HW3, and HW4.

### Samples

- Question Set 1
- Question Set 2
- Question Set 2 Solutions
- Question Set 3
- Fall 2020 Midterm
- Fall 2020 Midterm solutions
- Spring 2021 Midterm
- Spring 2021 Midterm solutions