EE 560 - Summer 2024 Digital Systems Design

Lectures

It is recommended that students take notes and actively participate during class meetings. Before class meetings, it is helpful to review relevant slide deck. Slides are in the shared Google Folder.

Exams

Exam Time Info
MT Wed, June 26 at 3 PM Pacific Info
Final Wed. July 17 at 3 PM Pacific Info

Lectures

Week Lecture - Tuesday Lab - Wednesday/Friday Lecture - Thursday
1
(5/14-5/16)
Semester has NOT started
[Slides]
Tools, VHDL, and Vivado; Parity Generator; Special Counter; Yards-Feet-Inches Course Overview
Gated Clocking
CAM
[Slides]
2
(5/21-5/23)
5-Stage CPU with BRAM
[Slides]
Gray Code Counter; Divider with Cache; Chipscope; UART Assistant FIFO with BRAM
[Slides]
3
(5/28-5/30)
Clk Skew
Timing Analysis
Wave Pipelining
[Slides]
CPU with BRAMs; FIFO with BRAMs (tentative) Tomasulo (Part 1-2)
[Slides]
4
(6/4-6/6)
Tomasulo (Part 3a)
[Slides]
Tomasulo, OoO Processor - (Front-end Components) Tomasulo (Part 3b)
[Slides]
5
(6/11-6/13)
Chip Multiprocessors (CMP)
[Slides]
Tomasulo, OoO Processor - (Back-end Components); AXI Chip Multiprocessors (CMP)
Barrel Shifters
Rotating Prioritizers
[Slides]
6
(6/17-6/20)
Non-linear Pipelines
Burst order
PCIe (Part 1)
[Slides]
Mon. 6/17 - CMP lab; Wed. 6/19 - Juneteenth Holiday PCIe (Part 2)
[Slides]
7
(6/25-6/27)
PCIe (Part 3)
Midterm review
[Slides]
Midterm (Lecture) GPGPU (Part 1)
(Lab) PCIe
[Slides]
8
(7/2-7/4)
GPUGPU (Part 2)
[Slides]
PCIe (Synthesis); GPGPU Holiday - July 4th
Possible lecture recording to watch
[Slides]
9
(7/9-7/11)
SRAM and DRAM
[Slides]
Demos SRAM, DRAM, DFT
Review
[Slides]
10
(7/16-7/18)
Study Day
[Slides]
Final Exam No lecture (Semester is over)
[Slides]