EE 560 - Summer 2025 Digital Systems Design

Homework

All homeworks are posted in the shared Google Folder.

Unless otherwise stated, you are to complete the homeworks individually.

Item Title Submission Type Due (at 11:59PM Pacific)
1 Review, Gated clocking, VHDL and Verilog Self-confirm (Gradescope) Fri, May 30
2 FIFO HW Gradescope Tues, June 10
3 Time Stealing/Borrowing & Wave pipelineing Self-confirm (Gradescope) Fri, June 20
4 Non-linear Pipelines Self-confirm (Gradescope) Mon, July 21