EE457 - Summer 2025 Computer Systems Organization

Lab 4

Due: See Assignments Page

Materials

See the the Labs..Lab4 subdirectory of the Shared folder

• Handout:: Read PDF the handout
• Skeleton Files: Download the skeleton file and testbench file in the provided .zip file which contains an almost complete 5-stage pipelined CPU that you will complete.

Procedure

In teams of 2:

• Follow the instructions in the handout.

• The .zip skeleton files contains two subfolders for part1 and part2. You need only complete the part1/cache_p1.v and part2/cache_msi.v. The testbench, memory model, and .do file are complete though you may add to the testbench as desired. Follow the instructions in the handout and the comments in the file itself to complete the design.

Submission

• Create a file with the name of you and your partner in a file names.txt.
• Zip your files: names.txt, cache_p1.v, and cache_msi.v in a SINGLE .ZIP file (not .bz2, not .gz, not .tar but zip) named lab4.zip.
• Submit your .ZIP file on the EE 457 Brightspace site in the Lab 4 dropbox under the Labs.